Symbols

loading...

Files

loading...

Summary Syntax Arguments References

SourceVuESP-IDF Framework and ExamplesESP-IDFREG_SET_BIT

REG_SET_BIT macro

Syntax

Show:

Summary

Declaration

#define REG_SET_BIT(_r, _b) do { \ ASSERT_IF_DPORT_REG((_r), REG_SET_BIT); \ *(volatile uint32_t*)(_r) = (*(volatile uint32_t*)(_r)) | (_b); \ } while(0)

Arguments

Argument

_r

_b

References

Code

Location

#define REG_SET_BIT(_r, _b) do { \

REG_SET_BIT(SPI_USER_REG(0), SPI_USR_MISO | SPI_USR_DUMMY | SPI_USR_ADDR);

esp_rom_spiflash.c:343

REG_SET_BIT(SPI_USER_REG(0), SPI_USR_MISO | SPI_USR_DUMMY | SPI_USR_ADDR);

esp_rom_spiflash.c:349

REG_SET_BIT(SPI_USER_REG(0), SPI_USR_DUMMY);

esp_rom_spiflash.c:370

REG_SET_BIT(SPI_USER_REG(0), SPI_USR_MISO | SPI_USR_ADDR);

esp_rom_spiflash.c:373

REG_SET_BIT(PERIPHS_SPI_FLASH_USRREG, SPI_USR_MISO | SPI_USR_DUMMY | SPI_USR_ADDR);

esp_rom_spiflash.c:564

REG_SET_BIT(PERIPHS_SPI_FLASH_USRREG, SPI_USR_MISO | SPI_USR_ADDR);

esp_rom_spiflash.c:571

REG_SET_BIT(PERIPHS_SPI_FLASH_USRREG, SPI_USR_DUMMY);

esp_rom_spiflash.c:578

REG_SET_BIT(PERIPHS_SPI_FLASH_USRREG, SPI_USR_DUMMY);

esp_rom_spiflash.c:594

REG_SET_BIT(PERIPHS_SPI_FLASH_USRREG, SPI_USR_DUMMY);

esp_rom_spiflash.c:603

REG_SET_BIT(PERIPHS_SPI_FLASH_USRREG, SPI_USR_MISO | SPI_USR_ADDR);

esp_rom_spiflash.c:606

REG_SET_BIT(CONFIG_REG, TIMG_LACT_ALARM_EN);

esp_timer_impl_lac.c:161

REG_SET_BIT(INT_CLR_REG, TIMG_LACT_INT_CLR);

esp_timer_impl_lac.c:263

REG_SET_BIT(CONFIG_REG, TIMG_LACT_INCREASE |

esp_timer_impl_lac.c:265

REG_SET_BIT(INT_ENA_REG, TIMG_LACT_INT_ENA);

esp_timer_impl_lac.c:298

REG_SET_BIT(INT_CLR_REG, TIMG_LACT_INT_CLR);

esp_timer_impl_lac.c:319

REG_SET_BIT(GPIO_PIN_MUX_REG[gpio_num], FUN_PU);

REG_SET_BIT(GPIO_PIN_MUX_REG[gpio_num], FUN_PD);

REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);

REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR);

rtc_cntl_ll.h:27

REG_SET_BIT(RTC_CNTL_INT_CLR_REG, RTC_CNTL_SAR_INT_CLR);

rtc_cntl_ll.h:66

REG_SET_BIT(RTC_CNTL_HOLD_FORCE_REG, rtc_io_desc[rtcio_num].hold_force);

rtc_io_ll.h:233

REG_SET_BIT(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].hold);

rtc_io_ll.h:234

REG_SET_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);

rtc_sleep.c:219

REG_SET_BIT(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START);

REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);

REG_SET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);

REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);

REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);

REG_SET_BIT(UART_FLOW_CONF_REG(uart_num), UART_FORCE_XOFF);

REG_SET_BIT(UART_FLOW_CONF_REG(uart_num), UART_FORCE_XON);

REG_SET_BIT(RTC_CNTL_INT_ENA_REG, RTC_CNTL_ULP_CP_INT_ENA_M);