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I2S_PDM_RX_CLK_DEFAULT_CONFIG macro
I2S default PDM RX clock configuration
Syntax
#define I2S_PDM_RX_CLK_DEFAULT_CONFIG(rate) { \
.sample_rate_hz = rate, \
.clk_src = I2S_CLK_SRC_DEFAULT, \
.mclk_multiple = I2S_MCLK_MULTIPLE_256, \
.dn_sample_mode = I2S_PDM_DSR_8S, \
.bclk_div = 8, \
}