flash_bank::bank_number - syntax, references, description

References

Code

Location

Referrer

unsigned int bank_number; /**< The 'bank' (or chip number) of this instance. */

core.h:83

bank->base = bank->bank_number * 0x40000;

ambiqmicro.c:195

ambiqmicro_read_part_info()

bank->base = bank->bank_number * 0x40000;

ambiqmicro.c:212

ambiqmicro_read_part_info()

retval = target_write_u32(target, 0x10000000, bank->bank_number);

ambiqmicro.c:362

ambiqmicro_mass_erase()

LOG_INFO("Mass erase on bank %d.", bank->bank_number);

ambiqmicro.c:380

ambiqmicro_mass_erase()

retval = target_write_u32(target, 0x10000000, bank->bank_number);

ambiqmicro.c:444

ambiqmicro_erase()

LOG_INFO("Erasing pages %u to %u on bank %u", first, last, bank->bank_number);

ambiqmicro.c:476

ambiqmicro_erase()

bank->bank_number = 0;

at91sam3.c:3033

sam3_flash_bank_command()

bank->bank_number = 1;

at91sam3.c:3043

sam3_flash_bank_command()

LOG_DEBUG("Begin: Bank: %u, Noise: %d", bank->bank_number, noise);

at91sam3.c:3134

_sam3_probe()

bank->bank_number = 0;

at91sam4.c:2519

sam4_flash_bank_command()

bank->bank_number = 1;

at91sam4.c:2529

sam4_flash_bank_command()

LOG_DEBUG("Begin: Bank: %u", bank->bank_number);

at91sam4.c:2640

sam4_probe()

LOG_DEBUG("fmcn[%i]: %i", bank->bank_number, (int)(fmcn));

at91sam7.c:280

at91sam7_set_flash_mode()

target_write_u32(target, mc_fmr[bank->bank_number], fmr);

at91sam7.c:282

at91sam7_set_flash_mode()

bank->bank_number)) & waitbits)) && (timeout-- > 0)) {

at91sam7.c:293

at91sam7_wait_status_busy()

LOG_DEBUG("status[%i]: 0x%" PRIx32 "", (int)bank->bank_number, status);

at91sam7.c:294

at91sam7_wait_status_busy()

LOG_DEBUG("status[%i]: 0x%" PRIx32 "", bank->bank_number, status);

at91sam7.c:298

at91sam7_wait_status_busy()

target_write_u32(target, mc_fcr[bank->bank_number], fcr);

at91sam7.c:321

at91sam7_flash_command()

bank->bank_number + 1,

at91sam7.c:324

at91sam7_flash_command()

t_bank->bank_number = bnk;

at91sam7.c:586

at91sam7_read_part_info()

status = at91sam7_get_flash_status(bank->target, bank->bank_number);

at91sam7.c:665

at91sam7_protect_check()

t_bank->bank_number = bnk;

at91sam7.c:774

at91sam7_flash_bank_command()

LOG_DEBUG("Write flash bank:%u page number:%" PRIu32, bank->bank_number, pagen);

at91sam7.c:957

at91sam7_write()

bank->bank_number = bank_num;

core.c:180

flash_bank_add()

LOG_ERROR("Unknown sector size for bank %u", bank->bank_number);

bank->bank_number,

lpcspifi_info->bank_num = bank->bank_number;

lpcspifi.c:846

lpcspifi_probe()

mrvlqspi_info->bank_num = bank->bank_number;

bank->bank_number);

bank->bank_number);

bank->bank_number);

bank->bank_number,

stm32x_handle_otp_command()

LOG_WARNING("Flash register base not defined for bank %u", bank->bank_number);

stm32h7x.c:789

stm32x_probe()

bank->bank_number, flash_size_in_kb, bank->base);

bank->bank_number,

bank->bank_number, stm32l4_otp_is_enabled(bank) ? "enabled" : "disabled");

stm32l4x.c:2585

stm32l4_handle_otp_command()

bank->bank_number, flash_size_in_kb, base_address);

stm32lx.c:825

stm32lx_probe()

p->bank_number,

tcl.c:105

handle_flash_info_command()

"in %fs", first, last, p->bank_number, duration_elapsed(&bench));

tcl.c:329

handle_flash_erase_command()

first, last, p->bank_number);

tcl.c:386

handle_flash_protect_command()

length, CMD_ARGV[1], bank->bank_number, offset,

tcl.c:837

handle_flash_write_bank_command()

written, CMD_ARGV[1], p->bank_number, offset,

tcl.c:919

handle_flash_read_bank_command()

length, CMD_ARGV[1], p->bank_number, offset,

tcl.c:1021

handle_flash_verify_bank_command()

p->default_padded_value, p->bank_number);

tcl.c:1071

handle_flash_padded_value_command()

"buswidth %u, chipwidth %u", p->bank_number,

tcl.c:1322

handle_flash_banks_command()

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Data Use

flash_bank::bank_number is written by 5 functions and is read by 29 functions:

sam3_flash_bank_command()

sam4_flash_bank_command()

at91sam7_read_part_info()

at91sam7_flash_bank_command()

flash_bank_add()

flash_bank::bank_number

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flash_bank::bank_number field

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